SK Hynix Announces Joint Package Optical Memory Expansion Roadmap

SK Hynix has announced a next-generation Joint Package Optical (CPO) technology roadmap aimed at solving data transmission bottlenecks in artificial intelligence (AI) infrastructure. On the 20th, SK Hynix and researchers from the University of Virginia published a joint paper in the scientific journal Nature Electronics, outlining the development direction of CPO technology in high-performance computing and AI fields. The paper points out the gap between the speed of computational performance increase and data movement capability, explaining that while computational performance triples every two years, interconnect bandwidth only increases by 1.4 times. As the scale of AI models and data centers grows, relying solely on the performance of computational devices makes it difficult to enhance overall processing speed, which is described as the 'bandwidth wall.' The CPO technology is proposed as an alternative to overcome the limitations of electrical signal-centric connections in AI infrastructure by placing optical components near chips or packages to reduce data movement distances. This roadmap includes plans to extend CPO technology to memory interfaces, with researchers suggesting a structure where multiple AI accelerators share a single memory pool. However, specific productization timelines or mass production plans were not included. This is the first time SK Hynix has unveiled a blueprint for AI interconnect architecture technology, which is significant as it highlights the memory company's focus on addressing data movement issues in AI systems as a technical agenda.

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